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  sd211de/sst211 series siliconix s-51850erev. f, 14-apr-97 1 n-channel lateral dmos fets sd211de sd213de sd215de sst211 sst213 sst215 product summary part number v (br)ds min (v) v gs(th) max (v) r ds(on) max (  ) c rss max (pf) t on max (ns) sd211de 30 1.5 45 @ v gs = 10 v 0.5 2 sd213de 10 1.5 45 @ v gs = 10 v 0.5 2 sd215de 20 1.5 45 @ v gs = 10 v 0.5 2 sst211 30 1.5 50 @ v gs = 10 v 0.5 2 sst213 10 1.5 50 @ v gs = 10 v 0.5 2 sst215 20 1.5 50 @ v gs = 10 v 0.5 2 features benefits applications  ultra-high speed switchinget on : 1 ns  ultra-low reverse capacitance: 0.2 pf  low guaranteed r ds @ 5 v  low turn-on threshold voltage  n-channel enhancement mode  high speed system performance  low insertion loss at high frequencies  low transfer signal loss  simple driver requirement  single supply operation  fast analog switch  fast sample-and-holds  pixel-rate switching  dac deglitchers  high-speed driver description the sd211de/sst211 series consists of enhancement- mode mosfets designed for high speed low-glitch switching in audio, video, and high-frequency applications. the sd211 may be used for  5-v analog switching or as a high speed driver of the sd214. the sd214 is normally used for  10-v analog switching. these mosfets utilize lateral construction to achieve low capacitance and ultra-fast switching speeds. an integrated zener diode provides esd protection. these devices feature a poly-silicon gate for manufacturing reliability. for similar products see: quad arrayesd5000/5400 series and non-zener protectionesd210de/214de.  $        
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 g s d to-206af (to-72) body substrate (case) 1 23 4 %#!" " updates to this data sheet may be obtained via facsimile by calling siliconix faxback, 1-408-970-5600. please request faxback document #70295. applications information may also be obtained via faxback, request document #70607.
sd211de/sst211 series 2 siliconix s-51850erev. f, 14-apr-97 absolute maximum ratings (t a = 25  c unless otherwise noted)  "  "!    211  211   
  213  213   
  215  215  
    "!       211  211   
          213  213   
         215  215             "!    211  211                 213  213                215  215 
             !"    211  211                 213  213                215  215 
             "!      211  211                 213  213               215  215 
            !"!      211  211  15               213  213               215  215 
            drain current 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . lead temperature ( 1 / 16 o from case for 10 seconds) 300  c . . . . . . . . . storage temperature 65 to 150  c . . . . . . . . . . . . . . . . . . . . . . . . . . . operating junction temperature 55 to 125  c . . . . . . . . . . . . . . . . . . power dissipation a 300 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. derate 3 mw/  c above 25  c specifications a limits 211 series 213 series 215 series parameter symbol b test conditions b typ c min max min max min max unit static drain-source bkd vl v (br)ds v gs = v bs = 0 v, i d = 10  a 35 30 breakdown voltage v (br)ds v gs = v bs = 5 v, i d = 10 na 30 10 10 20 source-drain breakdown voltage v (br)sd v gd = v bd = 5 v, i s = 10 na 22 10 10 20 v drain-substrate breakdown voltage v (br)dbo v gb = 0 v, i d = 10 na , source open 35 15 15
v source-substrate breakdown voltage v (br)sbo v gb = 0 v, i s = 10  a , drain open 35 15 15
drain-source lk i ds(off) v gs =v bs = 5v v ds = 10 v 0.4 10 10 leakage i ds(off) v gs = v bs = 5 v v ds = 20 v 0.9 10 source-drain lk i sd(off) v gd =v bd = 5v v sd = 10 v 0.5 10 10 na leakage i sd(off) v gd = v bd = 5 v v sd = 20 v 1 10 gate leakage i gbs v db = v sb = 0 v, v gb = 30v 0.01 100 100 100 threshold voltage v gs(th) v ds = v gs , i d = 1  a v sb = 0 v 0.8 0.5 1.5 0.1 1.5 0.1 1.5 v v gs = 5 v (sd series) 58 70 70 70  v gs = 5 v (sst series) 60 75 75 75  drain-source on resistance r ds ( on ) v sb = 0 v i d =  v gs = 10 v (sd series) 38 45 45 45  o n-res i stance r ds(on) i d =  v gs = 10 v (sst series) 40 50 50 50  v gs = 15 v 30 v gs = 20 v 26 v gs = 25 v 24
sd211de/sst211 series siliconix s-51850erev. f, 14-apr-97 3 specifications a limits 211 series 213 series 215 series parameter symbol b test conditions b typ c min max min max min max unit dynamic forward g fs v ds = 10 v sd series 11 10 10 10 forward transconductance g fs v ds = 10 v v sb = 0 v i d =20ma f=1khz sst series 10.5 9 9 9 ms transconductance g os i d = 20 ma, f = 1 khz all 0.9 gate node capacitance c (gs+gd+gb) 2.5 3.5 3.5 3.5 drain node capacitance c (gd+db) v ds = 10 v f=1mhz sd series 1.1 1.5 1.5 1.5 pf source node ci c (gs+sb) f = 1 mhz v gs = v bs = 15 v 3.7 5.5 5.5 5.5 pf capacitance c (gs+sb) v gs v bs 15 v sst series 4.2 reverse transfer capacitance c rss sd series 0.2 0.5 0.5 0.5 switching turn - on t ime t d(on) sd s i o l 0.5 1 1 1 t urn- o n t i me t r sd series only v sb = 0 v , v in 0 to 5 v, r g = 25  0.6 1 1 1 ns turn - of f time t d(off) v sb = 0 v , v in 0 to 5 v , r g = 25  v dd = 5 v, r l = 680  2 ns turn - of f t ime t f dd , l 6 notes: a. t a = 25  c unless otherwise noted. dmcba b. b is the body (substrate), and (br) is breakdown. c. typical values are for design aid only, not guaranteed nor subject to production testing.
sd211de/sst211 series 4 siliconix s-51850erev. f, 14-apr-97 typical characteristics leakage current vs. applied voltage on-resistance vs. temperature threshold voltage vs. temperature on-resistance vs. gate-source voltage common-source forward transconductance vs. drain current applied voltage (v) 020 i sbo i gss (diode) i d (off) @ v gs = v bg = 5 v i s(off) @ v gd = v bd = 5v i sbo @ v gb = 0 v, drain open 10 na 1 na 100 pa 10 pa 1 pa i s(off) leakage 300 04812 20 240 180 60 0 16 120 5 v 10 v v gs = 4 v 1 100 20 16 12 8 4 0 10 25  c v ds = 15 v v bs = 0 v t a = 55  c 125  c 100 60 60 20 20 100 140 80 60 40 20 0 10 v 15 v 20 v r ds(on) drain-source on-resistance ( 5 60 60 100 20 20 140 4 3 2 1 0 5 v 1 v 0 v v gs = v ds = v th i d = 1  a v bs = 10 v i d = 5 ma, v bs = 0 v 4 8 12 16 t a temperature (  c) t a temperature (  c) i d drain current (ma) g fs forward transconductance (ms) r ds(on) drain-source on-resistance ( v gs = 5 v output conductance vs. drain current 1.0 020 4 0.8 0.6 0.4 0.2 0 v ds = 5 v 15 v v bs = 0 v f = 1 khz i d drain current (ma) g os 81216 output conductance (ms) gate-source threshold voltage (v) v gs(th) v sb body-source voltage (v) i d(off) 10 v 0.5 v    
sd211de/sst211 series siliconix s-51850erev. f, 14-apr-97 5 typical characteristics (cont'd) threshold voltage vs. substrate-source voltage leakage current vs. temperature input admittance forward admittance capacitance vs. gate-source voltage body leakage current vs. drain-body voltage 5 0 4 20 4 3 2 1 0 h l v gs = v ds = v th i d = 1 ma t a = 25  c 100 10 1 25 50 75 100 125 i sbo i d(off) i s(off) i gss (diode) leakage (na) 10 04 20 8 6 4 2 0 v ds = 10 v, f = 1 mhz v gs = v bs capacitance (pf) c (gs+sb) c (gs+gd+gb) c (gd+db) c (dg) 01216 8 420 v db (v) i d = 13 ma 1 ma body leakage i b 100 10 1 0.1 100 1000 b is g is (ms) v ds = 10 v i d = 10 ma t a = 25  c 100 10 1 0.1 100 1000 (ms) v ds = 10 v i d = 10 ma t a = 25  c g fs b fs t a temperature (  c) v gs gate-source voltage (v) f frequency (mhz) f frequency (mhz) 8 12 16 81216 200 500 200 500 gate-source threshold voltage (v) v gs(th) i d(off) @ v gs = v bs = 5 v, v ds = 10 v i s(off) @ v gd = v bd = 5 v, v sd = 10 v i gss @ v gs = 10 v i sbo @ v sb = 10 v drain open 100  a 100 na 1 na 100 pa 1 pa 10  a 1  a 10 na 10 pa v bs body-source voltage (v)
sd211de/sst211 series 6 siliconix s-51850erev. f, 14-apr-97 typical characteristics reverse admittance output admittance switching characteristics output characteristics 1 0.1 0.01 0.001 100 1000 (ms) v ds = 10 v i d = 10 ma t a = 25  c b rs +g rg g rg 100 10 1 0.1 100 1000 (ms) v ds = 10 v i d = 10 ma t a = 25  c 700 600 500 0 01 7 400 300 200 100 23 4 56 t f fall time (ns) r l ( 50 04 20 40 30 20 10 0 4 v 3 v 2 v v bs = 0 v t a = 25  c v gs = 5 v b og g og f frequency (mhz) f frequency (mhz) v ds drain-source voltage (v) drain current (ma) i d 200 500 200 500 81216   switching time test circuit 510  r l 51 v in to scope +v dd v out to scope 0 v 50% 10% 90% t d(on) t d(off) t r t f +5 v 0 v +v dd v in v out input pulse: t d , t r < 1 ns pulse width: 100 ns rep rate: 1 mhz sampling scope t r < 360 ps r in = 1 m  c in = 2 pf bw = 500 mhz 50% 


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